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Home > Events > Software Seminar Series > 2017 > Verified Translation Validation of Static Analyses

Vincent Laporte

Tuesday, June 27, 2017

10:45am Lecture hall 1, level B

Vincent Laporte, Post-doctoral Researcher, IMDEA Software Institute

Verified Translation Validation of Static Analyses

Abstract:

Motivated by applications to security and high efficiency, we propose an automated methodology for validating on low-level intermediate representations the results of a source-level static analysis. Our methodology relies on two main ingredients: a relative-safety checker, an instance of a relational verifier which proves that a program is “safer” than another, and a transformation of programs into defensive form which verifies the analysis results at run-time. We prove the soundness of the methodology, and provide a formally verified instantiation based on the Verasco verified C static analyzer and the CompCert verified C compiler. We experiment with the effectiveness of our approach with client optimizations at RTL level, and static analyses for cache-based timing side-channels and memory usage at pre-assembly levels.